1. Field of the Invention
The present invention relates to video signal processing devices and, more particularly, to video signal processing devices adapted for processing synchronizing signal components which have been separated from a composite video signal having horizontal and vertical synchronizing signal components which define various video fields.
2. Description of the Prior Art
FIG. 1 shows a known synchronizing signal processing device of the kind referred to above. As shown in FIG. 1, a composite synchronizing signal Sync, which has been separated from a composite video signal, is inputted to the synchronizing signal processing device and is supplied to a horizontal synchronizing signal separation circuit 1 and a vertical synchronizing signal separation circuit 2. The horizontal synchronizing signal separation circuit 1 and the vertical synchronizing signal separation circuit 2 produce, respectively, a horizontal synchronizing signal HD and a vertical synchronizing signal VD. The horizontal synchronizing signal HD and the vertical synchronizing signal VD are supplied to a field discrimination circuit 3 so that the latter produces a field discrimination signal FD. As shown at (B) in FIG. 2, when the composite synchronizing signal Sync is generated by a 2 field-1 frame interlaced scanning system and is in proper synchronism (i.e. when its condition is normal), the field discrimination signal FD is produced in a certain relationship to the vertical synchronizing signal VD shown at (A) in FIG. 2, i.e., in a certain relation to odd number fields and even number fields of the composite synchronizing signal Sync which has been separated from the 2 field-1 frame video system signal. That is, the level of the field discrimination signal FD, shown at (B) in FIG. 2, corresponds to the field of the composite video signal. Thus the two fields of a 2 field-1 frame video system signal produce, alternatively, two different levels of the field discrimination signal FD. However, when there is any omission in the composite synchronizing signal Sync or when any noise is included in the composite synchronizing signal Sync, abnormal states are caused in the field descrimination signal FD as shown at (C) or (D) in FIG. 2.
An example of a known device for processing a video signal of this kind will be explained hereinunder in connection with FIG. 3 in which the same reference numerals are used to denote the same constituent elements appearing in FIG. 1.
An inputted composite video signal is supplied to a composite synchronizing signal separation circuit 11 in which the composite synchronizing signal Sync is separated from the inputted video signal. The separated composite synchronizing signal Sync is delivered to the horizontal synchronizing signal separation circuit 1 and to the vertical synchronizing signal separation circuit 2. These circuits 1 and 2 in turn separate and output the horizontal synchronizing signal HD and the vertical synchronizing signal VD. The separated vertical synchronizing signal is represented at (a) in FIG. 4. These synchronizing signals HD and VD are delivered to the field discrimination circuit 3 which then produces the field discrimination signal FD ((B) in FIG. 4) as explained before.
The horizontal synchronizing signal HD, the vertical synchronizing signal VD and the field discrimination signal FD are delivered, together with the inputted composite video signal, to a video signal processing circuit 12. The video signal processing circuit 12 processes the inputted video signal in accordance with the horizontal synchronizing signal HD, the vertical synchronizing signal VD and the field discrimination signal FD; and supplies the resulting processed signals to an output system. It may be assumed here, for example, that a printer device is used as the output system.
If the composite video signal is of the conventional 2 field-1 frame interlaced scanning type, it is subjected to an analog-to-digital conversion. The digital video signal is then transmitted to a memory in the video signal processing circuit 12, after a discrimination between the video signal of a first (odd number) field and the video signal of a second (even number) field according to the level of the field discrimination signal FD. The addresses in the memory are allotted depending on the type of the video signal. For instance, if the memory is a line memory which corresponds to picture elements on a line extending in the vertical direction on the outputted or displayed picture, odd number addresses are alloted to the video signals of the odd number fields, while even number addresses are alloted to the video signals of the even number fields. In case of a video printer, if the field discrimination signal FD has become abnormal as stated before, the printer cannot perform correct printing: that is, the quality of the printed picture is deteriorated seriously.
In recent years, there has been an increasing need to process video signals of the non-interlace scanning type, such as those outputted from a microcomputer, as well as video signals of the interlaced scanning type, such as those used for television. If video signals of the non-interlaced type are inputted to a device of the type shown in FIG. 3, the field discrimination circuit 3 undesirably judges that all the video signals belong to either one of the odd number fields and even number fields as shown at (C) or (D) in FIG. 4. That is the level of the output FD of the field discrimination circuit 3 remains the same for each successive field of the video signal.
When a printer device is used as the output system, the result is that the only scanning lines which are printed are those corresponding to the odd number fields or those corresponding to the even number fields, but not both. Alternatively, the scanning lines corresponding either to the odd number fields or to the even number fields may be printed correctly, but the scanning lines corresponding to the other fields are printed erroneously. Needless to say, the quality of the outputor printed picture is seriously deteriorated in both cases.